S.No.
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Topics
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Lectures
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Instructor
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References/Notes
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1
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Introduction:
Basic introduction to memory hierarchy.
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01-02
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SDR
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The von Neumann and
Harvard models. Instructions, memory, ALU, CPU, registers. Who
addresses and access what. Instructions and data for a CPU.
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03 Sep (Sat) {lecture#SDR-01} 10:00am-11:00am
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SDR
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[Online-only class: MS-Teams: 10:00am-11:00am]
(Make-up class for the 06 Sep (Tue) class to be missed)
MS-Teams folder:
video_intro1_03sep22.mp4,
lecture_notes_intro1_03sep22.pdf
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How does a computer boot up? (contd.)
Where does an Operating System come in?
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04 Sep (Sun) {lecture#SDR-02} 10:00am-11:00am
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SDR
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[Online-only class: MS-Teams: 10:00am-11:00am]
(Make-up class for the 07 Sep (Wed) class to be missed)
MS-Teams folder:
video_intro2_cache1_04sep22.mp4,
lecture_notes_intro2_cache1_04sep22.pdf
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2
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Caches
Types and Designs, Multiprocessor systems.
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02-06
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SDR
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[HP5, HP6] Cache Basics: Appendix B: Review of Memory Hierarchy.
Sections B.1 and B.2
Multiprocessor Cache Coherence: Chapter 5: Thread-Level
Parallelism. Sections 5.1 and 5.2
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The memory hierarchy.
What is a cache, and what is the role of a cache.
The need for a cache, predictions.
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04 Sep (Sun) {lecture#SDR-02} 10:00am-11:00am
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SDR
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[Online-only class: MS-Teams: 10:00am-11:00am]
(Make-up class for the 07 Sep (Wed) class to be missed)
MS-Teams folder:
video_intro2_cache1_04sep22.mp4,
lecture_notes_intro2_cache1_04sep22.pdf
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The special role of a cache for DSPs: caching data and instructions.
The Harvard Architecture for caches.
Caches for general purpose processors.
The four basic cache questions. Cache
organisation: direct mapped, fully associative and set associative.
Cache and memory blocks, and address spaces.
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09 Sep (Fri) {lecture#SDR-03} 10:00am-11:00am
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SDR
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MS-Teams folder:
video_cache2_09sep22.mp4, lecture_notes_cache2_09sep22.pdf
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In detail: the three cache organisations: direct mapped, fully
associative and set associative. Cache block replacement: LRU,
and alternatives.
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11 Sep (Sun) {lecture#SDR-04} 08:00am-09:00am
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SDR
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[Online-only class: 08:00am-09:00am]
(Make-up class for the 16 Sep (Fri) class to be missed)
MS-Teams folder:
video_cache3_11sep22.mp4,
lecture_notes_cache3_11sep22.pdf
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Cache write strategies: Write-Through and
Write-Back. Advantages and disadvantages of each. Write Allocate
and No Write Allocate: an introduction.
Cache write strategies: Write-Through and Write-Back (contd).
Advantages and disadvantages of each. Write Allocate
and No Write Allocate: an introduction.
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13 Sep (Tue) {lecture#SDR-05} 10:00am-11:00am
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SDR
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MS-Teams folder:
video_cache4_13sep22.mp4, lecture_notes_cache4_13sep22.pdf
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An example of Write Allocate and No Write Allocate.
Cache operation: a complete (loaded!) numerical example with split and
unified caches. This will illustrate basics of cache operations,
and practical issues with split and unified caches.
Cache operation: a complete (loaded!) numerical example with split and
unified caches (contd.).
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14 Sep (Wed) {lecture#SDR-06} 10:00am-11:00am
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SDR
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MS-Teams folder:
video_cache5_14sep22.mp4, lecture_notes_cache5_14sep22.pdf
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A brief digression to understand the
basic concepts of RISC pipelining, which are relevant to this example.
Introduction to Multiprocessor Cache Coherence.
Centralised shared memory architectures. Snooping Protocols: The
popular Write Invalidate Protocol.
Issues and basic philosophy.
The three possible states of a cache block.
The Write Invalidate Protocol, in all its gory details.
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20 Sep (Tue) {lecture#SDR-07} 10:00am-11:00am
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SDR
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MS-Teams folder:
video_cache6_20sep22.mp4, lecture_notes_cache6_20sep22.pdf
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The Write Invalidate Protocol, in all its gory details (contd).
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21 Sep (Wed) {lecture#SDR-08} 10:00am-11:00am
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SDR
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MS-Teams folder:
video_cache7_21sep22.mp4, lecture_notes_cache7_21sep22.pdf
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The Write Invalidate Protocol, in all its gory details (contd).
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23 Sep (Fri) {lecture#SDR-09} 10:00am-11:00am
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SDR
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MS-Teams folder:
video_cache8_vm1_23sep22.mp4,
lecture_notes_cache8_vm1_23sep22.pdf
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3
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Memory:
Virtual Memory.
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10-11
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SDR
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[HP5, HP6] Virtual Memory: Appendix B: Review of Memory Hierarchy. Section B.4
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Introduction to Virtual Memory: Paging and Segmentation
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23 Sep (Fri) {lecture#SDR-09} 10:00am-11:00am
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SDR
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MS-Teams folder:
video_cache8_vm1_23sep22.mp4,
lecture_notes_cache8_vm1_23sep22.pdf
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Paging and Segmentation (contd).
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07 Oct (Fri) {lecture#SDR-10} 10:00am-11:00am
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SDR
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MS-Teams folder:
video_vm2_07oct22.mp4, lecture_notes_vm2_07oct22.pdf
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Paging and Segmentation (contd).
A little follow-up on RISC pipelining: overcoming hazards through
static scheduling, to alleviate cases of data hazards and control
hazards.
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08 Oct (Sat) {lecture#SDR-11} 10:00am-11:00am
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SDR
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MS-Teams folder:
video_vm3_risc_08oct22.mp4,
lecture_notes_vm3_risc_08oct22.pdf
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Additional Minor
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18 Oct (Tue) 07:00pm-08:00pm. Upload
deadline on gradescope: 08:00pm.
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SDR
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[Paper-and-pen exam, as described in the relevant email]
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