Lokesh Siddhu is a research scholar at the Department of Computer Science & Engg, Indian Institute of Technology, Delhi. He is pursuing his PhD under the guidance of Prof. Preeti Ranjan Panda. He has a Masters' degree from Indian Institute of Science in Electronics Design And Technology. He has also worked with Intel for 3.5 years prior to joining the institute. His research interests include embedded systems, memory exploration and optimisation energy-efficient computing.
He spends his spare time by listening to music, watching movies and doing yoga. He also likes to go hiking and on long drives.
At Intel, I have worked on the backend design of units in the server and client core. I have worked on the design (timing, quality, noise, power) of complex data-path blocks like multipliers, shifters, aligners.
Worked on the most complex block of the execution cluster (EXE). Visited Intel Haifa (Israel) to learn FMA design. Carried out studies on the different FMA designs in Intel various cores.
I quickly ramped up on various design methodologies and started owning blocks in the execution cluster (EXE) of Intel core.
CGPA: 7.3/8 (Second highest). Class Topper in 1st, 3rd Semester. Studied various relevant subjects like Processor Design, Digital VLSI Circuits, Digital System Design with FPGAs and Embedded System Design.
Percentage: 80%. University topper in 3rd Semester. Studied various relevant subjects like VLSI Design, Microprocessor Design, Digital Electronics.
Thermal Aware Runtime Management of 3D Architecture:
Research in 3D integration has attracted researchers from industries as well as academics due to its benefits over 2D architecture such as better performance, lower power consumption, small form factor and support for heterogeneous technology integration. Furthermore, various 3D memories architectures have been proposed by industries/academia to cater to the high bandwidth requirement at low power. However, due to its higher power density and reduced heat dissipation properties, heat dissipation is one of the major challenges in the promising 3D integration technology. In this research, we aim to design thermal aware data/task mapping policies for 3D architectures.
Operand Isolation Circuits with Reduced Overhead for Low Power Data-Path Design:
Dynamic power dissipation due to redundant switching is an important metric in datapath design. Operand isolation attempts to reduce switching by clamping or latching the output of a first level of combinational circuits. In this research a novel method using power supply switching is proposed.
Publication: L. Siddhu, A. Mishra and V. Singh, "Operand Isolation with Reduced Overhead for Low Power Datapath Design," 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems, Mumbai, 2014, pp. 483-488.
Machine Learning (Sit through) by Parag Singla
COL 719: Synthesis of Digital Systems by Preeti R. Panda.
COL100: Introduction to Computer Science by Preeti R. Panda.
301 Research Scholars Room, 3rd Floor SIT,
IIT Delhi, New Delhi 110016 (India)