Our research group consists of the following students

PhD

  1. Nagaraju P : An Automation Methodology for Building Application Specific Processor Architectures and Compilers, July 2009 (Completed). (Joint with Anshul Kumar). Current Affiliation: Google Labs.
  2. Rajeswari D :Architectures and Synthesis Techniques for QCA Based Fabrics (Joint with M Balakrishnan)
  3. Sarat Chandran Varma :Framework for building High Performance Coprocessor for BioInformatics Applications(Joint with M Balakrishnan)
  4. Arun Kumar Parakh :Exploiting FPGAs and GPUs for High performance Computing (Joint with M Balakrishnan)
  5. Rajesh K Pal :A Framework for Building Secure Embedded Systems using MicroKernels with Hardware Support (joint with Sanjiva Prasad)
Masters

  1. Sohan Lal
  2. Puneet Kapoor
  3. Tapas Kundu
  4. Ashish Srivastava
  5.  Rohan Paul : Smart Cane --- Augmenting the white Cane for the Visually Challenged, June 2008.
  6.  Vaibhav : Assisting Independent Mobility of the Visually Challenged in Public Transfort Systems, June 2008.
  7.  Dheeraj Mehra : Assisting Independent Mobility of the Visually Challenged in Public Utility Buildings, June 2008. 
  8. Arun S Nair : Modelling and Specification of partial Runtime Reconfigurable Systems, June 2008.
  9.  Rohit Prakash : Framework for Codesign of Scientific Applications using Clusters augmented with FPGAs, June 2008
  10.  Lalit Kumar Bansal : Design and Implementation of a Digital Processor for Shack Hartmaan Wavefront Sensor System, June 2007.
  11.  Tejpal Verma : Automatic Wrapper Generation of custom IPs for Platform FPGAs, June 2007.
  12.  Rajiv Roy : Parallel Event-Driven HDL Simulation on Multicore a MultiProcessor Architectures, June 2007.
  13.  G Rakesh : Vision Based Mobile Landmark Localization using Artificial Landmarks, May 2007.
  14.  Somen Barma : Design, Development and Performance evaluation of MultiProcessor Systems on FPGA.
  15.  Uday Kiran P :Optimal Path Planning for Mobile Robots, May 2007.
  16.  Nikunj Shroff : Memory Hierarchy for MicroBlaze and PowerPC based Systems, May 2007.
  17.  Mayank Ahuja : Shared Memory MultiProcessor Embedded System on FPGA, December 2006.
  18.  Ratnesh Kumar : Design and Implementation of a Digital Processor for Target Tracking, May 2006.
  19.  Nilesh Padharia : A FLOPS based Model for Performance Analysis and Scheduling Applications fo Single and Multiple CPUs, May 2006.
  20.  Pratibha Sharma : SystemC Modelling --- Configuring Philips AThereal NoC using ARM, July 2005.

Btech
  1. Sanchit Arora  Robotics
  2. Ripudaman Singh Robotics
  3. Chinmay Inertial Sensors
  4. Nilay Vaish MultiProcessors on FPGA May 2007
  5. Rajat Sahni MultiProcessors on FPGA May 2007